{
  "schema_version": "1.0.0",
  "id": "CR-F-0001",
  "record_type": "finding",
  "title": "Crystal Vault plus Prism Scratch reference scenario crosses the modeled system break-even line",
  "claim": "Under the exact v0.6 Mixtral configuration and editable architecture assumptions, 48 Vault modules plus eight Scratch modules fit within 400 mm2 at 100 bit/um2, reduce the routed-weight service lower bound, and save modeled routed-weight energy; the selected physical-device evidence remains incomplete.",
  "evidence_class": "simulation_result",
  "status": "reported",
  "confidence": {
    "score": 0.72,
    "level": "moderate",
    "rationale": "The numerical result is deterministic and software-tested, but its architectural inputs include hypothetical density, bandwidth, energy, and reuse values that are not yet jointly demonstrated by a device stack."
  },
  "created_at": "2026-08-09T04:00:00Z",
  "updated_at": "2026-08-09T04:00:00Z",
  "contributors": [
    {
      "id": "crystalram-founders-session-2026-08-08",
      "kind": "human_ai_team",
      "role": "simulation_scientist",
      "model": null
    }
  ],
  "method": {
    "summary": "Run the dependency-free v0.6 break-even simulator for the bundled two-tier Mixtral scenario and compare hybrid routed-weight service and energy against the configured HBM lower bound while evaluating device evidence gates separately.",
    "code_revision": "pre-git-v0.6-baseline",
    "configuration": "CrystalRAM-Simulator-v0/configs/break_even_vault_scratch_v0.6.json",
    "data": "CrystalRAM-Simulator-v0/materials/material_presets_v0.6.json",
    "random_seed": null,
    "reproduce": [
      "cd CrystalRAM-Simulator-v0 && python3 crystalram_sim.py configs/break_even_vault_scratch_v0.6.json",
      "python3 CrystalRAM-Simulator-v0/tests/test_sim.py"
    ]
  },
  "results": [
    {"metric": "resident_equivalent_weight", "value": 4.932501504, "unit": "GB", "uncertainty": null, "scope": "48 Vault plus 8 Scratch Mixtral expert modules"},
    {"metric": "common_density_required", "value": 98.65003008, "unit": "bit/um2", "uncertainty": null, "scope": "400 mm2 total tier area"},
    {"metric": "total_area_at_scenario_density", "value": 394.60012032, "unit": "mm2", "uncertainty": null, "scope": "100 bit/um2 for both tiers"},
    {"metric": "routed_weight_service_speedup", "value": 1.86847, "unit": "x", "uncertainty": null, "scope": "weight-service lower bound only"},
    {"metric": "routed_weight_energy_savings", "value": 41.867955, "unit": "%", "uncertainty": null, "scope": "configured energy model"},
    {"metric": "system_verdict", "value": "break_even", "unit": null, "uncertainty": null, "scope": "editable architecture assumptions"},
    {"metric": "device_evidence_verdict", "value": "incomplete", "unit": null, "uncertainty": null, "scope": "selected GSSe Vault and Ce:YIG plus CoFeB Scratch candidates"}
  ],
  "assumptions": [
    "Both physical tiers achieve 100 bit/um2 effective complete-array density.",
    "The Vault covers 40.0% and Scratch covers an additional 6.52% of routed expert-module accesses.",
    "Effective optical bandwidth is 100 TB/s with 100 ns conversion overhead.",
    "HBM read energy is 5 pJ/bit and tier optical read energy is 0.5 pJ/bit.",
    "Programming overlap and rewrite rates match the bundled configuration."
  ],
  "limitations": [
    "This is a weight-service lower bound, not complete model token latency or throughput.",
    "The hit rates are architectural assumptions rather than all-layer, multi-prompt model measurements.",
    "Neither selected candidate has demonstrated 100 bit/um2 effective complete-array density.",
    "Packaging, ADC/DAC, thermal behavior, analog noise, calibration, and model accuracy are outside this simulation."
  ],
  "evidence": [
    {
      "kind": "configuration",
      "uri": "CrystalRAM-Simulator-v0/configs/break_even_vault_scratch_v0.6.json",
      "sha256": "23bfb8eb8639947f31aa44e7f50ce21051e3ccdfd47769f0b9fd65775842a5b4",
      "title": "v0.6 reference configuration",
      "supports": "The exact inputs used for the reported deterministic simulation.",
      "accessed_at": null
    },
    {
      "kind": "artifact",
      "uri": "CrystalRAM-Simulator-v0/v06_break_even_surface.csv",
      "sha256": "677611cdb25c8c6dd08a2815c8ed7321de8b0e2a7d88441d642a5260ac4346ef",
      "title": "v0.6 density and hit-rate sweep",
      "supports": "The modeled separation between capacity and reuse gates.",
      "accessed_at": null
    },
    {
      "kind": "test",
      "uri": "CrystalRAM-Simulator-v0/tests/test_sim.py",
      "sha256": "d284b350bc8c2012d2220d47a9b058159fc5fb16e1a36e50c8084ce176a9b3c1",
      "title": "Simulator regression tests",
      "supports": "Deterministic reference outputs and separation of system and device-evidence verdicts.",
      "accessed_at": null
    },
    {
      "kind": "source",
      "uri": "https://www.nature.com/articles/s41377-023-01213-3",
      "sha256": null,
      "title": "GSSe multilevel photonic RAM",
      "supports": "Published device metrics used by the bundled Vault candidate evidence record, not the hypothetical scenario density.",
      "accessed_at": "2026-08-09T04:00:00Z"
    },
    {
      "kind": "source",
      "uri": "https://www.nature.com/articles/s41566-024-01549-1",
      "sha256": null,
      "title": "Ce:YIG plus CoFeB magneto-optic memory",
      "supports": "Published device metrics used by the bundled Scratch candidate evidence record, not the hypothetical scenario density.",
      "accessed_at": "2026-08-09T04:00:00Z"
    }
  ],
  "relationships": [
    {
      "type": "tested_by",
      "target_id": "CR-E-0002",
      "note": "Complete-array density measurement tests the largest unresolved physical capacity assumption."
    },
    {
      "type": "tested_by",
      "target_id": "CR-E-0003",
      "note": "Programming and retention measurement tests missing GSSe Vault evidence gates."
    }
  ],
  "review_requirements": {
    "independent_reproductions": 1,
    "required_review_types": ["reproduction", "code", "device_physics"]
  }
}